A High-gain, fully balanced preamplifier is presented. The proposed structure advantages flipped voltage follower scheme to achieve a compact current conveyor with very low input impedance. The presented current conveyor then is used as a core element to realize a high-gain, gm-enhanced trans-conductance amplifier. The presented amplifier is suitable for application as a preamplifier. The high gain of amplifier makes it very suitable to be configured in a feedback form to deliver a high-precision predefined or programmable amplification gain. The proposed structure draws a very low power of 150nW from a 0.6V supply voltage. The Spectre Post-layout simulations with TSMC 180nm CMOS technology have been performed. The proposed amplifier exhibits an open-loop DC gain of 141.5dB and 3-dB frequency bandwidth of 2.4kHz at 60dB closed-loop configuration. The load capacitance is set to be 5pF. The proposed structure also delivers high CMRR and PSRR values of 148.3dB and 153.7dB, respectively.

A new output structure for class E power amplifier (PA) is proposed in this paper. A series LC resonator circuit, tuned near the second harmonic of the operating frequency is added to the output circuit. This resonator causes low impedance at the second harmonic. The output circuit is designed to shape the switch voltage of the class E amplifier and lower the voltage stress of the transistor. The maximum switch voltage of the conventional class E PA is 3.56Vdc. However, higher switch voltage of about 4.5VDC may be occurred, by considering nonlinear drain-to-source capacitance in class E PA. The obtained peak switch voltage of the designed class E PA is approximately 75% of the conventional one with the same conditions, which shows a significant reduction in peak switch voltage. MOSFET parasitic nonlinear gate-to-drain and nonlinear drain-to-source capacitances of the MOSFET body junction diode also affect the switch voltage in class E PA, which are considered in this paper. The actual MOSFETs have these parasitic capacitances; therefore, it is necessary to consider these elements in the design procedure. Reduced switch voltage in class E PA relaxes the breakdown voltage constraints of the active device. In the switch voltage of the designed circuit, the zero voltage and zero derivative switching (ZVS and ZVDS) conditions are satisfied. Simulation of the presented circuit is performed using PSpice and LTspice softwares. For verification of the designed circuit, the presented PA is fabricated and measured.

Photovoltaic (PV) panels rely on environmental conditions such as irradiation or temperature, and thus they require an interface boost converter. Non-isolated DC-DC boost converters have a lower volume, lower costs and lower power dissipation compared with isolated converters. In this study, a novel high efficiency non-isolated DC-DC boost converter is proposed to be used in PV systems. The converter includes only one semiconductor switch which causes lower switching losses. The main advantages of the proposed converter include low input current ripples, low voltage stress on semiconductor switches, high efficiency and low conduction losses. Moreover, maximum power is achieved from PV panels. A prototype of the proposed converter has been built, and experimental results are presented which explicitly validate theoretical results, suggesting that this boost converter is desirable for PV applications.

High step-up DC-DC converters are considered the main components of some lowvoltage and low-power fuel cell power system applications. A new DC-DC converter topology based on a two-stage switched capacitor-switched inductor multiplier is proposed in this paper. In comparison with other conventional and high step-up DCDC converters, the proposed converter topology provides higher voltage gain and lower switch voltage stresses for duty cycles in the range of 0. 6 or higher, the typical duty cycle of high step-up DC-DC converters. The proposed converter consists of a novel combination of switched capacitors and switched inductors methods that reduce the number of required switches and their duty cycles. The theoretical analysis was confirmed by simulation results in MATLAB/Simulink software environment results. A 100 W laboratory prototype of the proposed converter was implemented to investigate and validate the analytical and simulation results. The prototype DC-DC converter was designed and implemented for use in a commercial 100 W PEM fuel cell stack power system.

High dynamic range and adjustability of gain are the main requirements in low-voltage audio-frequency transconductors. There are several methods for designing a low voltage transconductor however, most of them have a fixed transconductance over their input range. In this paper a low distortion ohmic transconductor with adjustable gain has been designed. The circuit can operate from 3 V single power supply and has a very low distortion by choosing normal dimension for W/L of feedback transistors. To consider stray capacitances of the circuit we also perform L-Edit extraction. Then the final circuit has been carried out with 0.8.um CMOS Technology. Simulation has resulted a very low distortion as small as 0.2% for a 1.8Vpp sinusoidal input.

Severe voltage fluctuations at different points of the network are the main concerns of the widespread low-voltage electrical energy distribution networks. In particular, small industrial loads and rural consumers in remote geographical areas, which are fed by long lines, always experience great voltage drops. The use of common distribution transformers equipped with off-load tap changers has not been effective in solving this problem due to issues such as lack of access to all network points for operators, the need to de-energize the line during tap change, and the successive and unpredictable load changes. Therefore, the use of transformers with automatic voltage adjustment at different points of distribution networks has attracted much attention. The present research aimed to implement a simple solid-state voltage regulator (SSVR) in the low power range to automatically eliminate severe voltage fluctuations. In this research, a solid-state voltage regulator with a rated power of 5 KVA was designed and built to automatically compensate for the voltage of a small group of home customers (who have a severe voltage drop due to the distance from the distribution post). The results of the measurements showed that this equipment can limit the voltage changes to 220±3%, while it does not affect the power quality. In addition, various hardware and software protections were designed for the device built against network disturbances and abnormal consumer functions.

Design and simulation results of fully integrated 5-GHz CMOS LNAs are presented in this paper. Three different input impedance matching techniques are considered. Using a simple L-C network, the parasitic input resistance of a MOSFET is converted to a 50Ω resistance. As it is analytically proven, that is because the former methods enhance the gain of the LNA by a factor that is inversely proportional to MOSFET’s input resistance. The effect of each input impedance matching on the amplifier’s noise figure and gain is discussed. By employing the folded cascode configuration, these LNAs can operate at a reduced supply voltage and thus lower power consumption. To address the issue of nonlinearity in design of low voltage LNAs, a new linearization technique is employed. As a result, the IIP3 is improved extensively without sacrificing other parameters. These LNAs consume 1.3 mW power under a 0.6 V supply voltage.